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PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
PD444016-Y
4M-BIT CMOS FAST SRAM 256K-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION
Description
The PD444016-Y is a high speed, low power, 4,194,304 bits (262,144 words by 16 bits) CMOS static RAM. Operating supply voltage is 5.0 V 0.5 V. The PD444016-Y is packaged in 44-PIN PLASTIC TSOP (II).
Features
* 262,144 words by 16 bits organization * Fast access time : 8, 10, 12 ns (MAX.) * Byte data control : /LB (I/O1 - I/O8), /UB (I/O9 - I/O16) * Output Enable input for easy application * Single +5.0 V power supply
Ordering Information
Part number Package Access time ns (MAX.) Supply current mA (MAX.) At operating 220 200 190 At standby 10
PD444016G5-8Y-7JF PD444016G5-10Y-7JF PD444016G5-12Y-7JF
44-PIN PLASTIC TSOP (II) (10.16 mm (400)) (Normal bent)
8 10 12
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. M15391EJ1V0DS00 (1st edition) Date Published February 2001 NS CP(K) Printed in Japan
(c)
2001
PD444016-Y
Pin Configuration (Marking Side)
/xxx indicates active low signal.
44-PIN PLASTIC TSOP (II) (10.16 mm (400)) (Normal bent) [ PD444016G5-xx xxY-7JF ] xx
A0 A1 A2 A3 A4 /CS I/O1 I/O2 I/O3 I/O4 VCC GND I/O5 I/O6 I/O7 I/O8 /WE A5 A6 A7 A8 A9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
A17 A16 A15 /OE /UB /LB I/O16 I/O15 I/O14 I/O13 GND VCC I/O12 I/O11 I/O10 I/O9 NC A14 A13 A12 A11 A10
A0 - A17
: Address Inputs
I/O1 - I/O16 : Data Inputs / Outputs /CS /WE /OE /LB, /UB VCC GND NC : Chip Select : Write Enable : Output Enable : Byte data select : Power supply : Ground : No connection
Remark Refer to Package Drawing for the 1-pin index mark.
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Preliminary Data Sheet M15391EJ1V0DS
PD444016-Y
Block Diagram
Address buffer
A0 | A17
Row decoder
Memory cell array 4,194,304 bits
I/O1 - I/O8
Input data controller
Sense amplifier / Switching circuit Column decoder
Output data controller
I/O9 - I/O16 /WE /CS /LB
Address buffer /UB
/OE
VCC GND
Truth Table
/CS /OE /WE /LB /UB Mode I/O1 - I/O8 H L x L x H x L L H L x L L L H L L H x H x x H x L H L L H L x H Output disable Write Not selected Read High impedance DOUT DOUT High impedance DIN DIN High impedance High impedance High impedance I/O I/O9 - I/O16 High impedance DOUT High impedance DOUT DIN High impedance DIN High impedance High impedance ISB ICC Supply current
Remark x : Don't care
Preliminary Data Sheet M15391EJ1V0DS
3
PD444016-Y
Electrical Specifications
Absolute Maximum Ratings
Parameter Supply voltage Input / Output voltage Operating ambient temperature Storage temperature Symbol VCC VT TA Tstg Condition -0.5 Rating
Note
Unit V V C C
to +7.0
-0.5 Note to VCC+0.5 -40 to +85 -55 to +125
Note -2.0 V (MIN.) (pulse width : 2 ns)
Caution Exposing the device to stress above those listed in Absolute Maximum Rating could cause permanent damage. The device is not meant to be operated under conditions outside the limits described in the operational section of this specification. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
Recommended Operating Conditions
Parameter Supply voltage High level input voltage Low level input voltage Operating ambient temperature Symbol VCC VIH VIL TA Condition MIN. 4.5 2.2 -0.5
Note
TYP. 5.0
MAX. 5.5 VCC+0.5 +0.8 +85
Unit V V V C
-40
Note -2.0 V (MIN.) (pulse width : 2 ns)
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Preliminary Data Sheet M15391EJ1V0DS
PD444016-Y
DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
Parameter Input leakage current Output leakage current Symbol ILI ILO Test condition VIN = 0 V to VCC VI/O = 0 V to VCC, /CS = VIH or /OE = VIH or /WE = VIL or /LB = VIH or /UB = VIH Operating supply current ICC /CS = VIL, II/O = 0 mA, Cycle time : 8 ns Cycle time : 10 ns 220 200 190 40 10 mA mA MIN. -2 -2 TYP. MAX. +2 +2 Unit
A A
Minimum cycle time Cycle time : 12 ns Standby supply current ISB ISB1 /CS = VIH, VIN = VIH or VIL /CS VCC - 0.2 V, VIN 0.2 V or VIN VCC - 0.2 V High level output voltage Low level output voltage VOH VOL IOH = -4.0 mA IOL = +8.0 mA 2.4
V 0.4 V
Remarks 1. VIN : Input voltage VI/O : Input / Output voltage 2. These DC characteristics are in common regardless of product classification. Capacitance (TA = 25 C, f = 1 MHz)
Parameter Input capacitance Input / Output capacitance Symbol CIN CI/O VIN = 0 V VI/O = 0 V Test condition MIN. TYP. MAX. 6 8 Unit pF pF
Remarks 1. VIN : Input voltage VI/O : Input / Output voltage 2. These parameters are not 100% tested.
Preliminary Data Sheet M15391EJ1V0DS
5
PD444016-Y
AC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
AC Test Conditions Input Waveform (Rise and Fall Time 3 ns)
3.0 V 1.5 V GND Test Points 1.5 V
Output Waveform
1.5 V
Test Points
1.5 V
Output Load
AC characteristics directed with the note should be measured with the output load shown in Figure 1 or Figure 2.
Figure 1 (tAA, tACS, tOE, tABD, tOH)
VTT = +1.5 V
Figure 2 (tCLZ, tOLZ, tBLZ, tCHZ, tOHZ, tBHZ, tWHZ, tOW)
+5.0 V
50 ZO = 50 I/O (Output) 30 pF CL I/O (Output) 255
480
5 pF CL
Remark CL includes capacitances of the probe and jig, and stray capacitances.
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Preliminary Data Sheet M15391EJ1V0DS
PD444016-Y
Read Cycle
Parameter Symbol
PD444016-8Y
MIN. MAX.
PD444016-10Y
MIN. 10 MAX.
PD444016-12Y
MIN. 12 MAX.
Unit
Notes
Read cycle time Address access time /CS access time /OE access time /LB, /UB access time Output hold from address change /CS to output in low impedance /OE to output in low impedance /LB, /UB to output in low impedance /CS to output in high impedance /OE to output hold in high impedance /LB, /UB to output hold in high impedance
tRC tAA tACS tOE tABD tOH tCLZ tOLZ tBLZ tCHZ tOHZ tBHZ
8 8 8 4 4 3 3 0 0 4 4 4
ns 12 12 6 6 ns ns ns ns ns ns ns ns 6 6 6 ns ns ns 2, 3 1
10 10 5 5 3 3 0 0 5 5 5 3 3 0 0
Notes 1. See the output load shown in Figure 1. 2. Transition is measured at 200 mV from steady-state voltage with the output load shown in Figure 2. 3. These parameters are not 100% tested.
Read Cycle Timing Chart 1 (Address Access)
tRC Address (Input) tAA tOH I/O (Output) Previous data out Data out
Remarks 1. In read cycle, /WE should be fixed to high level. 2. /CS = /OE = /LB (or /UB) = VIL
Preliminary Data Sheet M15391EJ1V0DS
7
PD444016-Y
Read Cycle Timing Chart 2 (/CS Access)
tRC Address (Input) tAA tACS /CS (Input) tCLZ /OE (Input) tOE tOLZ /LB, /UB (Input) tABD tBLZ I/O (Output) High impedance Data out tBHZ High impedance tOHZ tCHZ
Caution
Address valid prior to or coincident with /CS low level input.
Remark
In read cycle, /WE should be fixed to high level.
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Preliminary Data Sheet M15391EJ1V0DS
PD444016-Y
Write Cycle
Parameter Symbol
PD444016-8Y
MIN. MAX.
PD444016-10Y
MIN. 10 7 7 7 7 5 0 0 0 MAX.
PD444016-12Y
MIN. 12 8 8 8 8 6 0 0 0 MAX.
Unit
Notes
Write cycle time /CS to end of write Address valid to end of write Write pulse width /LB, /UB to end of write Data valid to end of write Data hold time Address setup time Write recovery time /WE to output in high impedance Output active from end of write
tWC tCW tAW tWP tBW tDW tDH tAS tWR tWHZ tOW
8 6 6 6 6 4 0 0 0 4 3
ns ns ns ns ns ns ns ns ns 6 ns ns 1, 2
5 3 3
Notes 1. Transition is measured at 200 mV from steady-state voltage with the output load shown in Figure 2. 2. These parameters are not 100% tested. Write Cycle Timing Chart 1 (/WE Controlled)
tWC Address (Input) tCW /CS (Input) tAW tAS /WE (Input) tWP tWR
tBW /LB, /UB (Input) tOW tWHZ I/O (Input / Output) Indefinite data out High impedance tDW Data in tDH High impedance Indefinite data out
Cautions 1. /CS or /WE should be fixed to high level during address transition. 2. Do not input data to the I/O pins while they are in the output state. Remarks 1. Write operation is done during the overlap time of a low level /CS, /LB and/or /UB, and a low level /WE. 2. When /WE is at low level, the I/O pins are always high impedance. When /WE is at high level, read operation is executed. Therefore /OE should be at high level to make the I/O pins high impedance.
Preliminary Data Sheet M15391EJ1V0DS
9
PD444016-Y
Write Cycle Timing Chart 2 (/CS Controlled)
tWC Address (Input)
tAS /CS (Input) tAW tWP /WE (Input)
tCW
tWR
tBW /LB, /UB (Input) tDW High impedance I/O (Input) Data in tDH High impedance
Cautions 1. /CS or /WE should be fixed to high level during address transition. 2. Do not input data to the I/O pins while they are in the output state.
Remark
Write operation is done during the overlap time of a low level /CS, /LB and/or /UB, and a low level /WE.
10
Preliminary Data Sheet M15391EJ1V0DS
PD444016-Y
Write Cycle Timing Chart 3 (/LB, /UB Controlled)
tWC Address (Input) tAW tCW /CS (Input) tWP /WE (Input) tAS /LB, /UB (Input) tDW High impedance I/O (Input) Data in tDH High impedance tBW
tWR
Cautions 1. /CS or /WE should be fixed to high level during address transition. 2. Do not input data to the I/O pins while they are in the output state.
Remark
Write operation is done during the overlap time of a low level /CS, /LB and/or /UB, and a low level /WE.
Preliminary Data Sheet M15391EJ1V0DS
11
PD444016-Y
Package Drawing
44-PIN PLASTIC TSOP (II) (10.16 mm (400))
44 23 detail of lead end F
P E
1 A
22
H G S I J
C D M
M
N
S B K
L
NOTE Each lead centerline is located within 0.13 mm of its true position (T.P.) at maximum material condition.
ITEM A B C D E F G H I J K L M N P
MILLIMETERS 18.63 MAX. 0.93 MAX. 0.8 (T.P.) 0.32 +0.08 -0.07 0.10.05 1.2 MAX. 0.97 11.760.2 10.160.1 0.80.2 0.145+0.025 -0.015 0.50.1 0.13 0.10 3+7 -3 S44G5-80-7JF5-1
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Preliminary Data Sheet M15391EJ1V0DS
PD444016-Y
Recommended Soldering Conditions
Please consult with our sales offices for soldering conditions of the PD444016-Y.
Type of Surface Mount Device
PD444016G5-7JF
: 44-PIN PLASTIC TSOP (II) (10.16 mm (400)) (Normal bent)
Preliminary Data Sheet M15391EJ1V0DS
13
PD444016-Y
[ MEMO ]
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Preliminary Data Sheet M15391EJ1V0DS
PD444016-Y
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
Preliminary Data Sheet M15391EJ1V0DS
15
PD444016-Y
* The information in this document is current as of February, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. * No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. * NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. * Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. * While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. * NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above).
M8E 00. 4

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